• header-logo.png Department of Electronics and Electrical Engineering
    Indian Institute of Technology Guwahati
header-logo.png Department of Electronics
and Electrical Engineering

Name : JAYANT BHASKER

Program (completed) : M.Tech

Email : jbhasker@alumni.iitg.ac.in

Roll No : 194102407

Thesis Title : FPGA DESIGN OF MATRIX MULTIPLIER USING SYSTOLIC ARRAY ARCHITECTURE

Guide : Prof. Roy Paily P.