Syllabus (Core): M.Tech

VLSI System Design

Code: EE 515 | L-T-P-C : 3-0-0

Course Contents:

Basics of system hardware design: Hierarchical design using top-down and bottom-up methodology, System partitioning techniques, interfacing between system components, Handling multiple clock domains, Synchronous and asynchronous design styles; Design of finite state machines: state assignment strategies; The Processor: Data path and Control, Enhancing performance with Pipelining, exploiting of Memory hierarchy.

Texts / References:

1. G. De. Micheli, Synthesis and Optimisation of Digital Circuits, Tata McGraw-Hill, 2004.
2. D. A. Patterson and J. L. Hennessy, Computer Organization and Design: The Hardware/Software Interface, 2nd Edition, Morgan Kaufmann Publishers, Inc, 1998.
3. J. Rabaey, Digital Integrated Circuits, A Design Perspective, 2nd Edition, Pearson Education, 2003.
4. H. E. Weste and K. Eshraghian, Principles of CMOS VLSI Design, 2nd Edition, Eight Indian Reprint, Pearson Education, 2002.
5. C. Mead and L. Conway, Introduction to VLSI Systems, Addison Wesley, 1979.